urilogo.gif (327 bytes)University of Rhode Island
Department of Electrical and Computer Engineering

 

Section 2: Mentor Graphics IC Station Layout Tutorial

 


In this section you will use IC Station to create the Layout for the CMOS inverter.   The Layout will use Cherry Semiconductor's PS3 process and PS3 layout rules.

 

1) Invoke IC Station

If needed, start the Design Manager (DM) by typing "dmgr" at the command line.  When the DM window appears, use the MGC > Location Map > Set Working Directory menu item to change to the ~/inv directory that you created in Section 1.  Start IC Station by double clicking the "ic" button in DM's Tools Window.  IC Station should now appear on the desktop.  Some of the important windows in IC station are highlighted below.   Note that neither the Cell Window nor the Layer Palette will be visible when IC Station first starts.

ic_window.gif (27685 bytes)

 

2)  Create a new cell

Create a new cell using the File > Cell > Create pull-down menu, or you can also click the "Create" button on the Palette.  A Create Cell dialog box will appear.

A blank Cell window will open up.

 

3) Show Layer Palette

Displaying the Layer Palette will make the layout procedure much easier.  

sho_la_palette.gif (866 bytes)

Hit enter to execute the command.

la_palette_box.gif (7385 bytes)

(Show Layer Palette Box)

When you click OK, the Layer Palette will appear in the IC window with all the selected Layers.  Note:  Sometimes when the Layer Palette is visible, not all the Palette commands are visible.  You can right click on the Palette to show scrollbars for the window.

4) Lay out the inverter shapes and masks.

Once the Layer Palette is visible you can lay out the inverter.  Use the Easy Edit menu on the Palette to create the shapes and masks for the layout.  If you have trouble creating the shapes for the different layers, see the IC User's Manual Tutorial in the Bold Browser (type "bold_browser" at the command line).  A completed inverter layout can be seen here.  Please note the specific details for the PS3 process, if some of these details are missed, the LVS link in section 3 may not work.

5) Add Text to the VCC and GROUND Nets

Add text to the Metal_#1 shapes that represent the VCC and GROUND pins.  

metal_text.gif (21327 bytes)

 

6) Check for errors

IC Rules must be run manually to check for design rules errors.  To run IC Rules, click on "IC Rules" in the Palette, then Click on "Check".  IC Rules will display messages in the message bar as it runs.   When IC rules is complete, the following message will appear in the message bar:

DRC_error_text.gif (3117 bytes)

The "Total Results", in this case 3, indicates the number of design rule errors in your layout.  To view the errors one by one, use the "First" and "Next" buttons in the Palette.  As shown here, each error will be highlighted individually and a description of the error will be displayed in the message bar.  Fix all errors in the layout so that the "Total Results" of the IC Rules check is 0.

7) Creating Ports

Ports (or pins) are the inputs and outputs of your cell.  They define the functional interface for the cell component.  For the inverter, you must define 4 ports: in, out, VCC, and GROUND.

out_port.gif (18264 bytes)

make_port_box.gif (1675 bytes)

The inverter cell layout is now complete.  Save the cell and close the inverter Cell Window.

 

8) Create an LVS Cell

In order to link the cell using Layout vs. Schematic (LVS - Section 3), we need to create a second cell and add a few more layers. 

 


That's all for Section 2,
Go on to Section 3: LVS Tutorial


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Created by: Seth Milman, 6/27/98
Last Modified: 7/2/98