University
of Rhode Island Department of Electrical and Computer Engineering
University
of Rhode Island
Department of Electrical and Computer Engineering
Mentor Graphics IC Layout & Verification Tutorial
This tutorial will run through the steps that are needed to create and verify a simple CMOS inverter component using the Mentor Graphics IC design tools. The tutorial is broken down into three sections:
Section 1: Design Architect
In this step you will create a transistor level schematic sheet and a logic level symbol for the inverter.Section 2: IC Station
In this step you will use IC station and Cherry Semiconductor's PS3 process to create a VLSI layout cell for the inverter.Section 3: LVS
This step shows you how to use Layout vs. Schematic (LVS) to link together the schematic sheet and the IC cell.Section 4: Accusim
This step demonstrates the use of accusim as a circuit analysis tool.
Created by
Seth Milman, 7/1/98