Notes: More information on these topics may be found in the enclosed papers and on Prof. Gus Uht's Web site. In particular, the latter has tutorials on DEE and MCD (see below for definitions).

General Terms

Branch Effect Reduction Techniques (BERT) - Any technique used to reduce performance loss due to branches. 

Instruction Level Parallelism (ILP) - the ability to run several machine instructions simultaneously. Research has shown that there is much potential for paralellism in currently compiled code. Our effort is a hardware based approach to unlocking this parallelism.

Branch Prediction - predicting the direction of a branch without actually executing it.  There are several different methods for this currently in use.

Out Of Order execution (OOO) - The execution of instructions in a sequence other than the sequence mandated by the compiler; that is, other than the nominal sequential order.

Branch Domain - The instructions between a forward branch and its target, exclusive of the branch and the target; or the instructions between a backward branch and its target, inclusive of the branch and the target.

Levo Concepts

Execution Window (in the past called Instruction Window) - an n by m matrix of fetched instructions where n is the number of rows and m is the number of colums.

Disjoint Eager Executiom (DEE) - A speedup technique implemented in Levo. DEE is an optimal control speculation model developed by Dr. Uht in which the not-predicted path of a branch is typically speculatively executed later than the predicted path of a branch. The key idea of DEE is to assign resources to the most likely code to be executed over all unexecuted code.

Minimal Control Dependencies (MCD) - This technique developed by Dr. Uht reduces the ill effects of branches by allowing branches to execute independently of each other and in parallel. Also, instructions past the domain of a branch are independent of the branch and may be executed in parallel with it.

Resource Flow Execution - This technique, also developed by Dr. Uht, allows an instruction to execute whenever resources, such as a Processing Element (PE), are available, regardless of the dependencies of the instruction on any other prior or future instruction. Eventually, the correct nominal sequential order is maintained as necessary.