ICED Hardware

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ICED Hardware

Links to documentation on the ICED Protosys hardware:

Common data files:
		Parts Lists - for all ICED hardware (except EVC1)
		Connectors - for EVC1, d-cards and sys-card
		Wiring Data - for EVC1, d-cards and sys-card

sys-card - ICED motherboard: where the action is

d-card Transceiver Datasheet - logically, the d-card only consists of eight of these SCSI transceivers, 8 lines used in each

EVC1 data files. NOTE: we use the Xilinx XC4020E-2 FPGA.
		Xilinx 4000E Family Description - logical data
		Xilinx 4000E Electrical and Timing Characteristics
		Xilinx 4000E Pinouts

Protoboard Reprogrammable Logic Datasheet - Lattice Semiconductor GAL20RA10B-20LP

ICED Main Memory data. NOTE: we use a Clearpoint 8MB 60ns EDO DRAM SIMM. (MB=megabytes, ns=nanoseconds access time, EDO=Extended Data Out - can be ignored, DRAM=Dynamic Random Access Memory - read/write memory, SIMM=Single Inline Memory Module - a standard type of memory)
		SIMM Architecture - organization, schematic and pinout
		Memory chip used in the SIMM - 16 of these 4 megabit chips are on the SIMM, with no other active parts

Other hardware information:
		Xeltek Universal Logic/Prom Programmer - used for the reprogrammable PALs (GALs) used in the ICED interface logic on the Protoboard
		Metastability Application Note - from TI

Hardware testing information - for support staff:
		Testing the URI ICED Protosys Laboratory Hardware
		ICED Protosys Hardware System Tests - details of hardware static/dynamic system tests

Write us at: 4 East Alumni Ave, Kingston, RI 02881-0805, USA.
Phone: 401-874-2505, Fax: 401-782-6422.
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Page last updated: Friday, August 04, 2000