The University of Rhode Island
Department of Electrical and Computer Engineering

Design Automation

James C. Daly

Progress during Summer 1998

The objective this summer was to get Mentor Graphics software running at URI using Cherry specifications and to convert cells from the URI library of CMOS cells from magic to Mentor Graphics format. These objectives were met. The following Four tutorials were written describing the use of mentor graphic tools for IC design, simulation, layout and verification.

Sixteen digital and three analog cells were developed.

The complete report can be read at;

http://www.cae.cherry-semi.com/~jcd/design.automation/report.html

Mentor Graphics Tutorials
This sequence of four tutorials step you through a circuit design.

  • Design Architech
    In this tutorial you will create a transistor level schematic sheet and a logic level symbol for the inverter.

  • IC Station
    In this tutorial you will use IC station and Cherry Semiconductor's PS3 process to create a VLSI layout cell for the inverter.

  • LVS Layout vs Schematic
    This tutorial shows you how to use Layout vs. Schematic (LVS) to link the schematic sheet and the IC cell.

  • Accusim
    This tutorial demonstrates the use of accusim as a circuit analysis tool.
    • DIGITAL CELLS

    Documentation includes schematic diagrams, images of the layout, and accusim simulation waveforms used to determine gate delays.

    ANALOG CELLS

    Documentation includes schematic diagrams, images of the layout, accusim simulation waveforms, and hand calculations of important performance parameters.